#include "debug.h"
#include "../DDIC/AllDDIC.h"
#include "usbd_cdc_core.h"

/********************************************************************************************
********************************************************************************************
    R66455  写寄存器 读寄存器  写Gamma 读Gamma OTP烧录
********************************************************************************************
********************************************************************************************/
u32 USB_Demura_Transmode_start;
void R66455_Write_Register		 	(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8 buffer[],u16 LP_B7_Data,u16 HS_B7_Data);
void R66455_Write_Register_Demura	(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data);
void R66455_Read_Register		 	(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data);
void R66455_Write_Gamma			 	(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data);
void R66455_Gamma_OTP_Start		 	(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data);
void R66455_DLL_Calculation		 	(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data);	

void R66456_Flash_Read_Flow(USB_OTG_CORE_HANDLE *pdev,u8 SigMode ,u8 channel)
{
			u8 buffer1[5];
			u8 R66456_Flash_Read_Flow_Table[10]={0x09,0xf3,0x50,0x00,0x00,0x00,0x00,0x00,0x00,0x00};	

//#(1) Write Enable for Volatile Status Register			
			SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
			delay_ms(5);
			buffer1[0] = 0x02;
			buffer1[1] = 0xB0;
			buffer1[2] = 0x04;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
			buffer1[0] = 0x04;
			buffer1[1] = 0xDF;
			buffer1[2] = 0x5F;
			buffer1[3] = 0x02;
			buffer1[4] = 0x5A;						
			SSD2828_W_Array(SigMode,channel,buffer1,0);				
			delay_ms(5);			
			SSD2828_W_Array(SigMode,channel,R66456_Flash_Read_Flow_Table,0);					
			delay_ms(100);			
			buffer1[0] = 0x02;
			buffer1[1] = 0xF2;
			buffer1[2] = 0x11;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(100);				
//#(2) Write Status Register 2			
			R66456_Flash_Read_Flow_Table[2]=0x01;
			R66456_Flash_Read_Flow_Table[6]=0x01;
			R66456_Flash_Read_Flow_Table[8]=0xf4;
			SSD2828_W_Array(SigMode,channel,R66456_Flash_Read_Flow_Table,0);				
			buffer1[0] = 0x03;
			buffer1[1] = 0xF4;
			buffer1[2] = 0x00;
			buffer1[3] = 0x02;			
			SSD2828_W_Array(SigMode,channel,buffer1,0);			
			delay_ms(100);			
			buffer1[0] = 0x02;
			buffer1[1] = 0xF2;
			buffer1[2] = 0x19;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(100);				
//#(3) Flash read

			buffer1[0] = 0x02;
			buffer1[1] = 0xB0;
			buffer1[2] = 0x04;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
			buffer1[0] = 0x04;
			buffer1[1] = 0xDF;
			buffer1[2] = 0x5F;
			buffer1[3] = 0x02;
			buffer1[4] = 0x5A;						
			SSD2828_W_Array(SigMode,channel,buffer1,0);				
			R66456_Flash_Read_Flow_Table[2]=0x6B;
			R66456_Flash_Read_Flow_Table[4]=0x0F;
			R66456_Flash_Read_Flow_Table[6]=0xFF;
			R66456_Flash_Read_Flow_Table[8]=0xF4;
			SSD2828_W_Array(SigMode,channel,R66456_Flash_Read_Flow_Table,0);	
			delay_ms(100);				
			buffer1[0] = 0x02;
			buffer1[1] = 0xF2;
			buffer1[2] = 0x0F;		
			SSD2828_W_Array(SigMode,channel,buffer1,0);					
			delay_ms(500);		
			SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);	
}


void R66455_Flash_Write_End_Demura(USB_OTG_CORE_HANDLE *pdev,u8 SigMode ,u8 channel)
{
			u8 buffer1[5];
			SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);		
			delay_ms(1);	
			buffer1[0] = 0x03;
			buffer1[1] = 0xdf;
			buffer1[2] = 0x11;
			buffer1[3] = 0x42;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
}

void R66456_Demura_Load_to_Flash(USB_OTG_CORE_HANDLE *pdev,u8 SigMode ,u8 channel)
{
			u8 buffer1[5];
			u8 R66455_Flash_Operate_Function_Table[28]={0x1B,0xF5,0x71,0x00,0x02,0x00,0x00,0x02,0xFC,0x43,0x84,0xFC,0x43,0x00,0x0F,0x00,0x00,0x0F,0x1C,0x06,0x02,0x05,0x02,0x06,0x00,0x00,0x00,0x00};

//			u8 R66455_Read_REG=0xF4;	
			//SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);		
			SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
			delay_ms(5);
			//#  enter_sleep_mode
			buffer1[0] = 0x01;
			buffer1[1] = 0x10;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			buffer1[0] = 0x02;
			buffer1[1] = 0xB0;
			buffer1[2] = 0x04;
			SSD2828_W_Array(SigMode,channel,buffer1,0);					
			buffer1[1] = 0xD4;
			buffer1[2] = 0x12;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			buffer1[0] = 0x03;			
			buffer1[1] = 0xDF;
			buffer1[2] = 0x90;
			buffer1[3] = 0x00;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			buffer1[0] = 0x02;
			buffer1[1] = 0xB0;
			buffer1[2] = 0x04;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			buffer1[1] = 0xF1;
			buffer1[2] = 0x0B;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			buffer1[1] = 0xDF;
			buffer1[2] = 0x0B;
			SSD2828_W_Array(SigMode,channel,buffer1,0);			
			buffer1[1] = 0xF1;
			buffer1[2] = 0x16;
			SSD2828_W_Array(SigMode,channel,buffer1,0);						
			buffer1[0] = 0x04;			
			buffer1[1] = 0xDF;
			buffer1[2] = 0x10;
			buffer1[3] = 0x06;
			buffer1[4] = 0xFF;			
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);	
//# # SPI_UL=1	
			buffer1[0] = 0x02;
			buffer1[1] = 0xE1;
			buffer1[2] = 0x10;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
			delay_ms(5000);	
			delay_ms(2);		
			SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
}

void R66456_Flash_Write_En_Demura(USB_OTG_CORE_HANDLE *pdev,u8 SigMode ,u8 channel)
{
			u8 buffer1[5];
			u8 R66456_Flash_Operate_Function_Table[10]={0x09,0xf3,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
			u8 R66456_Flash_Operate_Function_Table2[10]={0x09,0xf3,0x05,0x00,0x00,0x00,0x00,0x00,0xF4,0x00};
//			u8 R66455_Read_REG=0xF4;	
			//SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);		
			SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
			delay_ms(5);
//#(1) Write Enable					
			buffer1[0] = 0x02;
			buffer1[1] = 0xB0;
			buffer1[2] = 0x04;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
			buffer1[0] = 0x04;
			buffer1[1] = 0xDF;
			buffer1[2] = 0x5F;
			buffer1[3] = 0x00;
			buffer1[4] = 0x5A;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
			delay_ms(5);					
			SSD2828_W_Array(SigMode,channel,R66456_Flash_Operate_Function_Table,0);
			delay_ms(5);
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x11;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
			delay_ms(5);	
//#(2) Read Status Register 1	
			SSD2828_W_Array(SigMode,channel,R66456_Flash_Operate_Function_Table2,0);
			delay_ms(5);	
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x09;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	

			SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
			delay_ms(5);	
			
}

void R66455_Flash_Write_En_Demura(USB_OTG_CORE_HANDLE *pdev,u8 SigMode ,u8 channel)
{
			u8 buffer1[5];
			u8 R66455_Flash_Operate_Function_Table[7]={0x06,0xf3,0x50,0x00,0x00,0x00,0x00};

//			u8 R66455_Read_REG=0xF4;	
			SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);		
			//SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);	
			delay_ms(2);
			buffer1[0] = 0x02;
			buffer1[1] = 0xB0;
			buffer1[2] = 0x00;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(2);																												
																	
			buffer1[0] = 0x03;
			buffer1[1] = 0xdf;
			buffer1[2] = 0x11;
			buffer1[3] = 0x40;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x11;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(1);
			R66455_Flash_Operate_Function_Table[2]=0x01;
			R66455_Flash_Operate_Function_Table[6]=0x01;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);
			buffer1[0] = 0x03;
			buffer1[1] = 0xf4;
			buffer1[2] = 0x00;
			buffer1[3] = 0x00;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x19;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(1);			
			R66455_Flash_Operate_Function_Table[2]=0x05;
			R66455_Flash_Operate_Function_Table[6]=0x00;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x09;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(1);
			R66455_Flash_Operate_Function_Table[2]=0x06;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x11;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(1);			
			R66455_Flash_Operate_Function_Table[2]=0x05;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x09;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(2);					
			SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
}

void R66456_Flash_Write_Demura(USB_OTG_CORE_HANDLE *pdev,u8 SigMode,u8 channel,u32 addr,u8 para[],u16 length)//R66456
{
		u8 buffer1[5];
		u16 data_num=0;
		u16 div=256;
		int i=0,j=0,data_num_tmp=0;
		u8 R66455_Flash_Operate_Function_Table[7]={0x06,0xf3,0x06,0x00,0x00,0x00,0x00};
		u8 R66455_Flash_Addr[7]={0x06,0xf3,0x02,0x00,0x0f,0x00,0xff};
		static u32 start_addr=0x0f00;
		data_num=length; //1080*3
		data_num_tmp=length;
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);	
		//SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);			
		while(data_num_tmp>=0)
		{			
			if(data_num_tmp/div>0)
			{	
				//R66455_Flash_Write_En_Demura(pdev,SigMode,channel);		
				buffer1[0] = 0x02;
				buffer1[1] = 0xB0;
				buffer1[2] = 0x04;
				SSD2828_W_Array(SigMode,channel,buffer1,0);		
				SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);
				buffer1[0] = 0x02;						
				buffer1[1] = 0xF2;
				buffer1[2] = 0x11;
				SSD2828_W_Array(SigMode,channel,buffer1,0);
				
				R66455_Flash_Addr[3]=(start_addr+addr-0-data_num+div*j)>>16;
				R66455_Flash_Addr[4]=(start_addr+addr-0-data_num+div*j)>>8;
				R66455_Flash_Addr[5]=(start_addr+addr-0-data_num+div*j);
				SSD2828_W_Array(SigMode,channel,R66455_Flash_Addr,0);
				//------------------------------------------------------		
				SSD2828_W_Reg(SigMode ,channel,0xBC, div+1);
				SSD2828_W_Reg(SigMode ,channel,0xBD, 0x0000);
				SSD2828_W_Cmd(SigMode ,channel,0xBF);	
		//	if(SigMode == Mipi_Mode)
		//	{    
				SSD2828_W_Data(SigMode ,channel,0xf4);
				for(i = 0; i <div; i++)
				{
					SSD2828_W_Data(SigMode ,channel,para[i+div*j]);
				}
				j+=1;
	//		}
			}
			else
			{	
				R66455_Flash_Addr[3]=(start_addr+addr-0-data_num+div*j)>>16;
				R66455_Flash_Addr[4]=(start_addr+addr-0-data_num+div*j)>>8;
				R66455_Flash_Addr[5]=(start_addr+addr-0-data_num+div*j);
				SSD2828_W_Array(SigMode,channel,R66455_Flash_Addr,0);
		//------------------------------------------------------		
				SSD2828_W_Reg(SigMode,channel,0xBC,data_num%div+1);
				SSD2828_W_Reg(SigMode,channel,0xBD,0x0000);
				SSD2828_W_Cmd(SigMode,channel,0xBF);	 
				SSD2828_W_Data(SigMode,channel,0xf4);
				for(i=0;i<data_num%div;i++)
				{
					SSD2828_W_Data(SigMode,channel,para[i+div*j]);
				}
			}
			data_num_tmp=data_num_tmp-div;
			buffer1[0] = 0x02;
			buffer1[1] = 0xF2;
			buffer1[2] = 0x1B;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			delay_ms(2);			
			//delay_us(1500);
		}				
}

void R66455_Flash_Write_Demura(USB_OTG_CORE_HANDLE *pdev,u8 SigMode,u8 channel,u32 addr,u8 para[],u16 length)
{
		u8 buffer1[5];
		u16 data_num=0;
		u16 div=256;
		int i=0,j=0,data_num_tmp=0;
		u8 R66455_Flash_Operate_Function_Table[7]={0x06,0xf3,0x06,0x00,0x00,0x00,0x00};
		u8 R66455_Flash_Addr[7]={0x06,0xf3,0x02,0x00,0x0f,0x00,0xff};
		static u32 start_addr=0x0f00;
		data_num=length; //1080*3
		data_num_tmp=length;
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);	
			
		//SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);			
				while(data_num_tmp>=0)
				{			
					if(data_num_tmp/div>0)
					{	
						//R66455_Flash_Write_En_Demura(pdev,SigMode,channel);		
						buffer1[0] = 0x02;
						buffer1[1] = 0xB0;
						buffer1[2] = 0x04;
						SSD2828_W_Array(SigMode,channel,buffer1,0);		
						SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);
						buffer1[0] = 0x02;						
						buffer1[1] = 0xF2;
						buffer1[2] = 0x11;
						SSD2828_W_Array(SigMode,channel,buffer1,0);
						
						R66455_Flash_Addr[5]=(start_addr+addr-0-data_num+div*j)>>16;
						R66455_Flash_Addr[4]=(start_addr+addr-0-data_num+div*j)>>8;
						R66455_Flash_Addr[3]=(start_addr+addr-0-data_num+div*j);
						SSD2828_W_Array(SigMode,channel,R66455_Flash_Addr,0);
				//------------------------------------------------------		
						SSD2828_W_Reg(SigMode ,channel,0xBC, div+1);
						SSD2828_W_Reg(SigMode ,channel,0xBD, 0x0000);
						SSD2828_W_Cmd(SigMode ,channel,0xBF);	
				//	if(SigMode == Mipi_Mode)
				//	{    
						SSD2828_W_Data(SigMode ,channel,0xf4);
						for(i = 0; i <div; i++)
						{
							SSD2828_W_Data(SigMode ,channel,para[i+div*j]);
						}
						j+=1;
			//		}
					}
					else
					{	
						R66455_Flash_Addr[5]=(start_addr+addr-0-data_num+div*j)>>16;
						R66455_Flash_Addr[4]=(start_addr+addr-0-data_num+div*j)>>8;
						R66455_Flash_Addr[3]=(start_addr+addr-0-data_num+div*j);
						SSD2828_W_Array(SigMode,channel,R66455_Flash_Addr,0);
				//------------------------------------------------------		
						SSD2828_W_Reg(SigMode ,channel,0xBC, data_num%div+1);
						SSD2828_W_Reg(SigMode ,channel,0xBD, 0x0000);
						SSD2828_W_Cmd(SigMode ,channel,0xBF);	 
						SSD2828_W_Data(SigMode ,channel,0xf4);
						for(i = 0; i <data_num%div; i++)
						{
							SSD2828_W_Data(SigMode ,channel,para[i+div*j]);
						}				
					}
					data_num_tmp=data_num_tmp-div;
					buffer1[0] = 0x02;
					buffer1[1] = 0xF2;
					buffer1[2] = 0x1B;
					SSD2828_W_Array(SigMode,channel,buffer1,0);		
					delay_ms(2);
					//delay_us(600);
				}				
}
void R66451_Flash_Write_Demura(USB_OTG_CORE_HANDLE *pdev,u8 SigMode,u8 channel,u32 addr,u8 para[],u16 length)//R66456
{
		u8 buffer1[5];
		u16 data_num=0;
		u16 div=256;
		int i=0,j=0,data_num_tmp=0;
		u8 R66455_Flash_Operate_Function_Table[7]={0x06,0xf3,0x06,0x00,0x00,0x00,0x00};
		u8 R66455_Flash_Addr[7]={0x06,0xf3,0x02,0x00,0x0f,0x00,0xff};
		static u32 start_addr=0x0f00;
		data_num=length; //1080*3
		data_num_tmp=length;
		start_addr = USB_Demura_Transmode_start;//////alan--20191022
		LP_B7_Data = LP_DCS_Short_Write;
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);	
		while(data_num_tmp>=0)
		{			
			if(data_num_tmp/div>0)
			{	
				buffer1[0] = 0x02;
				buffer1[1] = 0xB0;
				buffer1[2] = 0x04;
				SSD2828_W_Array(SigMode,channel,buffer1,0);		
				SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);
				buffer1[0] = 0x02;						
				buffer1[1] = 0xF2;
				buffer1[2] = 0x11;
				SSD2828_W_Array(SigMode,channel,buffer1,0);
				R66455_Flash_Addr[5]=(start_addr+addr-0-data_num+div*j)>>16;
				R66455_Flash_Addr[4]=(start_addr+addr-0-data_num+div*j)>>8;
				R66455_Flash_Addr[3]=(start_addr+addr-0-data_num+div*j);
				SSD2828_W_Array(SigMode,channel,R66455_Flash_Addr,0);
				SSD2828_W_Reg(SigMode ,channel,0xBC, div+1);
				SSD2828_W_Reg(SigMode ,channel,0xBD, 0x0000);
				SSD2828_W_Cmd(SigMode ,channel,0xBF);	
				SSD2828_W_Data(SigMode ,channel,0xf4);
				for(i = 0; i <div; i++)
				{
					SSD2828_W_Data(SigMode ,channel,para[i+div*j]);
				}
				j+=1;
			}
			else
			{	
				R66455_Flash_Addr[5]=(start_addr+addr-0-data_num+div*j)>>16;
				R66455_Flash_Addr[4]=(start_addr+addr-0-data_num+div*j)>>8;
				R66455_Flash_Addr[3]=(start_addr+addr-0-data_num+div*j);
				SSD2828_W_Array(SigMode,channel,R66455_Flash_Addr,0);
				SSD2828_W_Reg(SigMode,channel,0xBC,data_num%div+1);
				SSD2828_W_Reg(SigMode,channel,0xBD,0x0000);
				SSD2828_W_Cmd(SigMode,channel,0xBF);	 
				SSD2828_W_Data(SigMode,channel,0xf4);
				for(i=0;i<data_num%div;i++)
				{
					SSD2828_W_Data(SigMode,channel,para[i+div*j]);
				}
			}
			data_num_tmp=data_num_tmp-div;
			buffer1[0] = 0x02;
			buffer1[1] = 0xF2;
			buffer1[2] = 0x1B;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
			delay_ms(2);			
				}				
}

void R66455_Flash_Erase_Demura(USB_OTG_CORE_HANDLE *pdev,u8 SigMode ,u8 channel)
{
			u8 buffer1[5];
			u8 R66455_Flash_Operate_Function_Table[7]={0x06,0xf3,0x50,0x00,0x00,0x00,0x00};
			u8 R66455_Read_REG=0xF4;	
			
			buffer1[0] = 0x02;
			buffer1[1] = 0xB0;
			buffer1[2] = 0x00;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			buffer1[0] = 0x03;
			buffer1[1] = 0xdf;
			buffer1[2] = 0x11;
			buffer1[3] = 0x40;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x11;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(2);
			R66455_Flash_Operate_Function_Table[2]=0x01;
			R66455_Flash_Operate_Function_Table[6]=0x01;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);	
			buffer1[0] = 0x03;
			buffer1[1] = 0xf4;
			buffer1[2] = 0x00;
			buffer1[3] = 0x00;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x19;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			delay_ms(2);
			R66455_Flash_Operate_Function_Table[2]=0x05;
			R66455_Flash_Operate_Function_Table[6]=0x00;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);	
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x09;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			delay_ms(2);		
			R66455_Flash_Operate_Function_Table[2]=0x06;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);	
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x11;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			delay_ms(2);	
			R66455_Flash_Operate_Function_Table[2]=0x05;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);	
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x09;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			delay_ms(2);	
	//----------------------------------------------------------		
			SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
			delay_ms(5);	
			SSD2828_W_Reg(SigMode,channel,0xBC,0x0001); 
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //return package  
			do
			{						 
				buffer1[0] = 0x01;
				buffer1[1] = R66455_Read_REG;
				SSD2828_W_Array(SigMode,channel,buffer1,0); 
				delay_ms(6);
				buffer[4]=SSD2828_R_Reg(SigMode,channel,0xFF);		
			}while((buffer[4]&0x02)!=0x02);		
		//--------------------------------------------------------	
			SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data); 
			delay_ms(5);
			R66455_Flash_Operate_Function_Table[2]=0x60;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);	
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x11;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			delay_ms(5500);	
			R66455_Flash_Operate_Function_Table[2]=0x05;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);	
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x09;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			delay_ms(2);					
	//----------------------------------------------------------		
			SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
			delay_ms(5);	
			SSD2828_W_Reg(SigMode,channel,0xBC,0x0001); 
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //return package  
			do
			{						 
				buffer1[0] = 0x01;
				buffer1[1] = R66455_Read_REG;
				SSD2828_W_Array(SigMode,channel,buffer1,0); 
				delay_ms(6);
				buffer[4]=SSD2828_R_Reg(SigMode,channel,0xFF);		
			}while((buffer[4]&0x00)!=0x00);		//busy
		//--------------------------------------------------------
			buffer1[0] = 0x03;
			buffer1[1] = 0xDF;
			buffer1[2] = 0x11;
			buffer1[3] = 0x42;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(5);
}

void R66456_Flash_Erase_Demura(USB_OTG_CORE_HANDLE *pdev,u8 SigMode ,u8 channel)
{
			u8 buffer1[5];
			u8 R66455_Flash_Operate_Function_Table[10]={0x09,0xf3,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
//			u8 R66455_Read_REG=0xF4;	
			
			buffer1[0] = 0x02;
			buffer1[1] = 0xB0;
			buffer1[2] = 0x04;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			buffer1[0] = 0x04;
			buffer1[1] = 0xDF;
			buffer1[2] = 0x5F;
			buffer1[3] = 0x00;
			buffer1[4] = 0x58;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
			delay_ms(100);			
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);
			delay_ms(100);
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x11;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(100);
			buffer1[0] = 0x02;			
			buffer1[1] = 0xb0;
			buffer1[2] = 0x04;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(2);					
			R66455_Flash_Operate_Function_Table[2]=0x05;
			R66455_Flash_Operate_Function_Table[8]=0xf4;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);	
			delay_ms(100);
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x09;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			delay_ms(100);
				
			buffer1[0] = 0x02;				
			buffer1[1] = 0xb0;
			buffer1[2] = 0x04;
			SSD2828_W_Array(SigMode,channel,buffer1,0);	
			buffer1[0] = 0x04;
			buffer1[1] = 0xDF;
			buffer1[2] = 0x5F;
			buffer1[3] = 0x00;
			buffer1[4] = 0x58;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			delay_ms(5);			
			R66455_Flash_Operate_Function_Table[2]=0x60;
			R66455_Flash_Operate_Function_Table[8]=0x00;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);	
			delay_ms(100);			
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x11;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			delay_ms(5500);	
			buffer1[0] = 0x02;			
			buffer1[1] = 0xb0;
			buffer1[2] = 0x04;
			SSD2828_W_Array(SigMode,channel,buffer1,0);
			delay_ms(2);					
			R66455_Flash_Operate_Function_Table[2]=0x05;
			R66455_Flash_Operate_Function_Table[8]=0xf4;
			SSD2828_W_Array(SigMode,channel,R66455_Flash_Operate_Function_Table,0);	
			buffer1[0] = 0x02;
			buffer1[1] = 0xf2;
			buffer1[2] = 0x09;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			delay_ms(100);			
			buffer1[0] = 0x02;			
			buffer1[1] = 0xb0;
			buffer1[2] = 0x04;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			delay_ms(2);			
}

void R66455_Write_Register(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
    //SSD2828_W_Reg(SigMode,channel,0xB7,(LP_B7_Data&0xFBFF)|0x0400); 
		SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);		
    delay_ms(5);
		SSD2828_W_Array(SigMode,channel,buffer,2);

    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
    delay_ms(5);
    buffer[4] = Uart_Error_None;
    STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 写寄存器状态  ：ok
}
void R66455_Read_Register(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
    u16 tmp;
		u8 buffer1[3];
    SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);                               
    SSD2828_W_Reg(SigMode,channel,0xC1,buffer[2]-1); //return package size                                
    SSD2828_W_Reg(SigMode,channel,0xC0,0x0001); //reset
	
    buffer1[0] = 0x01;
    buffer1[1] = buffer[3]; 	//download register 
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    delay_ms(5);  
    SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
    SSD2828_W_Cmd(SigMode,channel,0xFF);
    for(i=0;i<buffer[2]-1;i++)  //data read out length
    {
        SSD2828_W_Cmd(SigMode,channel,0xFA);		
        tmp=SPI3_Read_u16_Data(channel);
        buffer[4+i]=tmp>>8;
        buffer[5+i]=tmp;
        delay_ms(5);
        i++;
    }
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
    STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 读取的 寄存器数据  ：ok 
}
void R66455_Write_Gamma(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u8 buffer1[3];
		//red V1023=5.3750 ,v0
		//green v1023=4.7822 ,v0
		//blue v1023=5.3982 v6.124
		u8 r66455_cxh[]={0x91,0xCC,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF
										,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x0F,0xFC,0x00,0x00
										,0x00,0x00,0x00,0x00,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF
										,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x0F,0xFC,0x00,0x00,0x00,0x00,0x00,0x00
										,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF
										,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x0F,0xFC
										};  //145 data
		//RED=P7-P10     : X2_R[9:8],X2_R[7:0],Y2_R[11:8],Y2_R[7:0]
		//GREEN=P55-P58  : X2_G[9:8],X2_G[7:0],Y2_G[11:8],Y2_G[7:0]
		//BLUE=P103-P106 : X2_B[9:8],X2_B[7:0],Y2_B[11:8],Y2_B[7:0]
		SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);														
		//SSD2828_W_Reg(SigMode,channel,0xB7,(LP_B7_Data&0xFBFF)|0x0400); 
		delay_ms(5);

		switch(buffer[1]&0xf0)
		{
			case 0x00:r66455_cxh[1]=0xCC;break;	//Gamma set0		
			case 0x10:r66455_cxh[1]=0xCB;break;	//Gamma set1	
			case 0x20:r66455_cxh[1]=0xCA;break;	//Gamma set2	
			case 0x30:r66455_cxh[1]=0xC9;break;	//Gamma set3	
			case 0x40:r66455_cxh[1]=0xC8;break;	//Gamma set4	
			case 0x50:r66455_cxh[1]=0xC7;break;	//Gamma set5	
			case 0x60:r66455_cxh[1]=0xC6;break;	//Gamma set6	
			
			case 0x70:r66455_cxh[1]=0xC5;break;	//Gamma set7	
			case 0x80:r66455_cxh[1]=0xC4;break;	//Gamma set8	
			case 0x90:r66455_cxh[1]=0xC3;break;	//Gamma set9		
			case 0xA0:r66455_cxh[1]=0xC2;break;	//Gamma set10	
			case 0xB0:r66455_cxh[1]=0xC1;break;	//Gamma set11		
			case 0xC0:r66455_cxh[1]=0xC0;break;	//Gamma set12				
			default:break;	
		}		
//RED		
		r66455_cxh[8]= buffer[3];//X2_LV >> 8
		r66455_cxh[9]= buffer[4];//X2_LV
		r66455_cxh[10]= buffer[5];//Y2_R >> 8
		r66455_cxh[11]= buffer[6];//Y2_R		
//GREEN
		r66455_cxh[56]= buffer[3];//X2_LV >> 8
		r66455_cxh[57]= buffer[4];//X2_LV
		r66455_cxh[58]= buffer[7];//Y2_B >> 8
		r66455_cxh[59]= buffer[8];//Y2_B		
//BLUE
		r66455_cxh[104]=buffer[3];//X2_LV >> 8
		r66455_cxh[105]=buffer[4];//X2_LV
		r66455_cxh[106]=buffer[9];//Y2_G >> 8
		r66455_cxh[107]=buffer[10];//Y2_G		
	
    buffer1[0] = 0x02;//group0 inter
    buffer1[1] = 0xB0; 	
		if(buffer[2]&0x80) //r66456
		{
				buffer1[2] = 0x80;		
		}

		else //R66455&R66451
		{
				buffer1[2] = 0x00;	
		}			
    SSD2828_W_Array(SigMode,channel,buffer1,0); 
		SSD2828_W_Array(SigMode,channel,r66455_cxh,0);
		delay_ms(2);
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
    delay_ms(5);
    buffer[4] = Uart_Error_None;
    STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,(buffer[2]&0xEF)+3);           //返回 写Gamma状态  ：ok  		
}

void R66455_Write_Gamma_13position(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u8 buffer1[3];
		int i=0,j=7;
		static u8 r66455_cxh[]={0x91,0xCC,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF
										,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x0F,0xFC,0x00,0x00
										,0x00,0x00,0x00,0x00,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF
										,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x0F,0xFC,0x00,0x00,0x00,0x00,0x00,0x00
										,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF
										,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x03,0xFF,0x0F,0xFC,0x0F,0xFC
										};  //145 data
		//r66455_cxh[2]-r66455_cxh[49]	RED
		//r66455_cxh[50]-r66455_cxh[97]	 GREEN										
		//r66455_cxh[98]-r66455_cxh[145]	 BLUE
		r66455_cxh[2+48*(buffer[3]&0x0F)]=buffer[5];		//y0 MSB   x0 cut
		r66455_cxh[3+48*(buffer[3]&0x0F)]=buffer[6];	  //y0 LSB																				
		for(i=4+48*(buffer[3]&0x0F);i<48+48*(buffer[3]&0x0F);)	//RED 2=num+cmd 
		{										
				r66455_cxh[i]=((buffer[j]*4+buffer[j]/64)>>8)&0x03;	//x1		
				r66455_cxh[i+1]=((buffer[j]*4+buffer[j]/64))&0xff;		//x1		
				r66455_cxh[i+2]=buffer[j+1]&0X0F;	//y1	 MSB
				r66455_cxh[i+3]=buffer[j+2]&0xFF;	//y2   LSB   buffer[4]
				i=i+4;
				j=j+3; 
		}
		r66455_cxh[48+48*(buffer[3]&0x0F)]=buffer[41];		//y255 MSB  x255 cut
		r66455_cxh[49+48*(buffer[3]&0x0F)]=buffer[42];	  //y255 LSB	
								
		SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);														
		delay_ms(2);	
		switch(buffer[1]&0xf0)
		{
				case 0x00:r66455_cxh[1]=0xCC;break;	//Gamma set0		
				case 0x10:r66455_cxh[1]=0xCB;break;	//Gamma set1	
				case 0x20:r66455_cxh[1]=0xCA;break;	//Gamma set2	
				case 0x30:r66455_cxh[1]=0xC9;break;	//Gamma set3	
				case 0x40:r66455_cxh[1]=0xC8;break;	//Gamma set4	
				case 0x50:r66455_cxh[1]=0xC7;break;	//Gamma set5	
				case 0x60:r66455_cxh[1]=0xC6;break;	//Gamma set6	
				
				case 0x70:r66455_cxh[1]=0xC5;break;	//Gamma set7	
				case 0x80:r66455_cxh[1]=0xC4;break;	//Gamma set8	
				case 0x90:r66455_cxh[1]=0xC3;break;	//Gamma set9		
				case 0xA0:r66455_cxh[1]=0xC2;break;	//Gamma set10	
				case 0xB0:r66455_cxh[1]=0xC1;break;	//Gamma set11		
				case 0xC0:r66455_cxh[1]=0xC0;break;	//Gamma set12			
				
				default:break;	
		}			
    buffer1[0] = 0x02;//group0 inter
    buffer1[1] = 0xB0; 
		if(buffer[3]&0x80) //R66456
		{		
			buffer1[2] = 0x80; //Bank1
		}
		else //R66455&R66451
		{
			buffer1[2] = 0x00; //Bank0
		}	
    SSD2828_W_Array(SigMode,channel,buffer1,0); 
		SSD2828_W_Array(SigMode,channel,r66455_cxh,0);
		delay_ms(1);
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
    delay_ms(2);
    buffer[4] = Uart_Error_None;
    STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 写Gamma状态  ：ok  		
}

void R66455_Read_Gamma_13position(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
    u16 tmp;
		u8 buffer1[3];
	  u8 gamma_reg=0;
	
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);		
    delay_ms(5);
    buffer1[0] = 0x02;//group0 inter
    buffer1[1] = 0xB0; 
		if(buffer[3]&0x80) //R66456
		{		
			buffer1[2] = 0x80; //Bank1
		}
		else //R66455&R66451
		{
			buffer1[2] = 0x00; //Bank0
		}	
    SSD2828_W_Array(SigMode,channel,buffer1,0); 		
		switch(buffer[1]&0xf0)
		{
				case 0x00:gamma_reg=0xCC;break;	//Gamma set0		
				case 0x10:gamma_reg=0xCB;break;	//Gamma set1	
				case 0x20:gamma_reg=0xCA;break;	//Gamma set2	
				case 0x30:gamma_reg=0xC9;break;	//Gamma set3	
				case 0x40:gamma_reg=0xC8;break;	//Gamma set4	
				case 0x50:gamma_reg=0xC7;break;	//Gamma set5	
				case 0x60:gamma_reg=0xC6;break;	//Gamma set6	
				
				case 0x70:gamma_reg=0xC5;break;	//Gamma set7	
				case 0x80:gamma_reg=0xC4;break;	//Gamma set8	
				case 0x90:gamma_reg=0xC3;break;	//Gamma set9		
				case 0xA0:gamma_reg=0xC2;break;	//Gamma set10	
				case 0xB0:gamma_reg=0xC1;break;	//Gamma set11		
				case 0xC0:gamma_reg=0xC0;break;	//Gamma set12			
				
				default:break;	
		}	
		
    SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);                               
    SSD2828_W_Reg(SigMode,channel,0xC1,buffer[2]-1); //return package size                                
    SSD2828_W_Reg(SigMode,channel,0xC0,0x0001); //reset
	
    buffer1[0] = 0x01;
    buffer1[1] = gamma_reg; 	//GAMMA register group x
    SSD2828_W_Array(SigMode,channel,buffer1,0);
    delay_ms(5);  
    SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
    SSD2828_W_Cmd(SigMode,channel,0xFF);
    for(i=0;i<buffer[2]-1;i++)  //data read out length
    {
        SSD2828_W_Cmd(SigMode,channel,0xFA);		
        tmp=SPI3_Read_u16_Data(channel);
        buffer[4+i]=tmp>>8;
        buffer[5+i]=tmp;
        delay_ms(5);
        i++;
    }
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
    STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 读取的 寄存器数据  ：ok 
}

void R66455_Gamma_OTP_Start(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u8 buffer1[8];
		SSD2828_W_Reg(SigMode,channel,0xB7,(LP_B7_Data&0xFBFF)|0x0400); 	
		delay_ms(15);
    buffer1[0] = 0x02;
    buffer1[1] = 0xB0; 
    buffer1[2] = 0x04;
    SSD2828_W_Array(SigMode,channel,buffer1,0); 	//# Unlock MCP
    buffer1[0] = 0x01;
    buffer1[1] = 0x28; 
    SSD2828_W_Array(SigMode,channel,buffer1,0); 	//#  Display off
    buffer1[0] = 0x01;
    buffer1[1] = 0x10; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);   //#  Enter_sleep_mode
		delay_ms(234);
    buffer1[0] = 0x02;
    buffer1[1] = 0xB0; 
    buffer1[2] = 0x84;
    SSD2828_W_Array(SigMode,channel,buffer1,0); 	//# Bank 1
	
if(buffer[3]==0x2)	//R66456
{
	buffer1[0] = 0x02;
	buffer1[1] = 0xE6; 
	buffer1[2] = 0x80;
	SSD2828_W_Array(SigMode,channel,buffer1,0);	  //# NVM load on after exit_Sleep mode
	buffer1[0] = 0x02;
	buffer1[1] = 0xB0; 
	buffer1[2] = 0x04;
	SSD2828_W_Array(SigMode,channel,buffer1,0); 	//# Bank 0		
	buffer1[0] = 0x02;
	buffer1[1] = 0xE3; 
	buffer1[2] = 0xFF;
	SSD2828_W_Array(SigMode,channel,buffer1,0); 	//#
	delay_ms(10);
	buffer1[0] = 0x05;
	buffer1[1] = 0xE0; 
	buffer1[2] = 0xC1;
	buffer1[3] = 0x00; 
	buffer1[4] = 0x00;		
	buffer1[5] = 0x01;	
	buffer1[6] = 0x00; 
	buffer1[7] = 0x00;	
	SSD2828_W_Array(SigMode,channel,buffer1,0); //# NVM write Start (Display Profile)
	delay_ms(1010);
	buffer1[0] = 0x05;
	buffer1[1] = 0xE0; 
	buffer1[2] = 0xC3;
	buffer1[3] = 0x00; 
	buffer1[4] = 0x00;		
	buffer1[5] = 0x01;	
	buffer1[6] = 0x00; 
	buffer1[7] = 0x00;	
	SSD2828_W_Array(SigMode,channel,buffer1,0); //# NVM write Start (ID Read)	
	delay_ms(1010);
	buffer1[0] = 0x05;
	buffer1[1] = 0xE0; 
	buffer1[2] = 0xC5;
	buffer1[3] = 0x00; 
	buffer1[4] = 0x00;		
	buffer1[5] = 0x01;	
	buffer1[6] = 0x00; 
	buffer1[7] = 0x00;	
	SSD2828_W_Array(SigMode,channel,buffer1,0); //# NVM write Start (Gamma Setting)
	delay_ms(1010);
	buffer1[0] = 0x05;
	buffer1[1] = 0xE0; 
	buffer1[2] = 0xC7;
	buffer1[3] = 0x00; 
	buffer1[4] = 0x00;		
	buffer1[5] = 0x01;	
	buffer1[6] = 0x00; 
	buffer1[7] = 0x00;	
	SSD2828_W_Array(SigMode,channel,buffer1,0); //# NVM write Start (IP Setting)
	delay_ms(1010);	
	buffer1[0] = 0x02;
	buffer1[1] = 0xE0; 
	buffer1[2] = 0x41;
	SSD2828_W_Array(SigMode,channel,buffer1,0); 	 //# NVMAEN=1h: NVM Access ON, TEM=1h : TE report NVM verification status	
}

else if(buffer[3]==0x1)	//R66455
{
	buffer1[0] = 0x02;
	buffer1[1] = 0xE6; 
	buffer1[2] = 0x81;
	SSD2828_W_Array(SigMode,channel,buffer1,0);	  //# NVM load on after exit_Sleep mode
	buffer1[0] = 0x02;
	buffer1[1] = 0xB0; 
	buffer1[2] = 0x04;
	SSD2828_W_Array(SigMode,channel,buffer1,0); 	//# Bank 0		
	buffer1[0] = 0x02;
	buffer1[1] = 0xE3; 
	buffer1[2] = 0xFF;
	SSD2828_W_Array(SigMode,channel,buffer1,0); 	//# NVM load enable			
	buffer1[0] = 0x05;
	buffer1[1] = 0xE0; 
	buffer1[2] = 0x61;
	buffer1[3] = 0x00; 
	buffer1[4] = 0x00;		
	buffer1[5] = 0x01;			
	SSD2828_W_Array(SigMode,channel,buffer1,0); //# NVM write Start
	delay_ms(1234);	
	buffer1[0] = 0x02;
	buffer1[1] = 0xE0; 
	buffer1[2] = 0x11;
	SSD2828_W_Array(SigMode,channel,buffer1,0); 		
}
else if	(buffer[3]==0x0)	//R66451
{	
	buffer1[0] = 0x02;// # NVM load on after exit_Sleep mode
	buffer1[1] = 0xE6; 
	buffer1[2] = 0x80;
	SSD2828_W_Array(SigMode,channel,buffer1,0); 
	buffer1[0] = 0x02;//# Bank 0
	buffer1[1] = 0xB0; 
	buffer1[2] = 0x04;
	SSD2828_W_Array(SigMode,channel,buffer1,0); 
	buffer1[0] = 0x02;
	buffer1[1] = 0xE3; 
	buffer1[2] = 0xFF;
	SSD2828_W_Array(SigMode,channel,buffer1,0); 	//# NVM load enable		
	buffer1[0] = 0x07;// VPP_NVM
	buffer1[1] = 0xE0; 
	buffer1[2] = 0x31;
	buffer1[3] = 0x00; 
	buffer1[4] = 0x00;		
	buffer1[5] = 0x00;		
	buffer1[6] = 0x00;	
	buffer1[7] = 0x01;	
	SSD2828_W_Array(SigMode,channel,buffer1,0); //# NVM write Start
	delay_ms(1234);	
	buffer1[0] = 0x02;
	buffer1[1] = 0xE0; 
	buffer1[2] = 0x11;
	SSD2828_W_Array(SigMode,channel,buffer1,0); 	
}	
		delay_ms(1234);	
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
    delay_ms(5);
    buffer[4] = Uart_Error_None;
    STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 写Gamma状态  ：ok 		
}



void R66455_DLL_Calculation(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	u8 buffer1[3];
	SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);														
	delay_ms(5);		
	
	buffer1[0] = 0x02;//group0 inter
	buffer1[1] = 0xB0; 
	buffer1[2] = 0x00;
	SSD2828_W_Array(SigMode,channel,buffer1,0); 	
	delay_ms(5);
	SSD2828_W_Array(SigMode,channel,buffer,2);
	delay_ms(5);

	SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
	delay_ms(5);
	buffer[4] = Uart_Error_None;
	STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 写Gamma状态  ：ok  	;
}

void ProcessForIc30(  USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8 buffer[],u16 LP_B7_Data,u16 HS_B7_Data)
{	
	//void *pdev;
	switch(buffer[1]&0x0f)
	{
		case 0x01:                                      //写寄存器
				R66455_Write_Register(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);
				break;
		case 0x02:                                      //读寄存器
				R66455_Read_Register(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);
				break;
		case 0x03:                                      //写Gamma
				R66455_Write_Gamma(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);
				break;
		case 0x04:                                      //读Gamma
				R66455_Gamma_OTP_Start(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data); 
				break;
		case 0x05: 
				R66455_DLL_Calculation(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data); 
				break;
		case 0x06: 
				R66455_Write_Gamma_13position(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data); 
				break;
		case 0x07: 
				R66455_Read_Gamma_13position(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data); 
				break;		
//		case 0x0f:
//				R66455_Write_Register_Demura(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);
//				//Demura: 0x30 0x0f add3 add2 add1 add0 //0xf4(spiflashbufferaddr)
//				break;
		default:break;
	}			
}
	




/*************************************************************************************

*/
